摘要
由于高带宽存储器(High Bandwidth Memory,HBM)的高带宽特性,在2.5D封装中介层(Interposer)的版图设计过程中存在大量HBM接口的连线需要手动完成。介绍了如何使用SKILL语言在Allegro封装设计工具(Allegro Package Design,APD)中实现HBM接口的自动布线,将原来的手动布线时间从2周缩短到10 min,大大压缩设计周期。
Due to the high bandwidth characteristics of HBM(high bandwidth memory), there are a large number of HBM interface connections that need to be manually completed during the layout design of the 2.5D package interposer. This article describes how to use the SKILL language to implement automatic wiring of HBM interface in APD(Allegro package design), reducing the original manual wiring from 2 weeks to 10 minutes, saving design cycles.
作者
张成
谈玲燕
曾令玥
Zhang Cheng;Tan Lingyan;Zeng Lingyue(Globalfoundries China(Shanghai) Co. Limited,Shanghai 201204,China)
出处
《电子技术应用》
2019年第8期68-70,74,共4页
Application of Electronic Technique