基于仿真背板的软硬件协同处理器故障注入机制分析

Fault Injection Mechanism Analysis of Hardware and Software Co-processor Based on Simulation Backplane

针对软硬件协同故障注入机制缺乏对空间环境单粒子支持,本文利用硬件描述语言的外部接口来完成底层硬件信号与上层软件的信号传输与调度,构建了一个非侵入型的故障注入平台,实现自动获取注入故障数据并从信号池中选择自动化目标信号,并进行实验评测。实验评测得到:各测试程序完成仿真过程约需10000纳秒,所以把整个测试过程以平均的方式分成10段,再从从信号故障池内随机选择一个寄存器来完成不同时间段的故障注入过程。可以利用故障注入平台来实现处理器故障的高效触发,之后再执行不同的容错方案,实现早期调试与获得合理容错方案的目的。

In view of the hardware and software collaborative fault injection mechanism lacks support for single particle space environment, this paper completes the underlying hardware signal transmission and scheduling, by using external interface hardware description language and the upper software it builts a non inasieness fault injection platform, automatically get into failure data and selects automation target signal, the signal from the pool of experiment and evaluation.Experimental evaluation shows that it takes about 10,000 nanoseconds for each test program to complete the simulation process, so the entire test process is divided into 10 segments in an average way, and then a register is randomly selected from the signal fault pool to complete the fault injection process in different time periods.The fault injection platform can be used to effectively trigger processor faults, and then different fault tolerant schemes can be executed to achieve the purpose of early debugging and obtaining reasonable fault tolerant schemes.