基于FPGA的M-LVDS总线控制器设计

Design of M-LVDS Bus Controller Based on FPGA

针对传统总线无法同时满足不同节点间高速通信、实时通信、电气隔离、与故障隔离的问题,提出了基于M-LVDS总线的高速通信系统设计方案。系统用M-LVDS总线取代了传统总线,用FPGA来实现M-LVDS总线控制器,可以实现节点的故障隔离。

Aiming at the problem that traditional bus system cannot meet the requirements of real-time communication, high-speed communication, electrical isolation and fault isolation at the same time, a design scheme of high-speed communication system based on M-LVDS is proposed in the paper. The system uses M-LVDS to replace the traditional bus, and uses FPGA to realize the M-LVDS controller. And FPGA is the bridge device between CPU and M-LVDS. The test result shows that the operation of the system is stable, the transmission is accurate, and the expected transmission task is successfully completed. When FPGA detects the fault, FPGA can realize the fault isolation of the faulty node.