功率NLDMOS电学安全工作区的版图设计优化

Layout Design Optimization for Power NLDMOS Electrical Safe Operating Area

在不调整制备工艺、不增加工艺成本条件下,研究了管芯版图优化对功率n型横向扩散金属氧化物半导体(NLDMOS)电学安全工作区(E-SOA)的影响。通过研究p^+带嵌入方式、p^+图形形状、p^+分布密度、阵列单元栅宽及总栅数、金属引线方式等进行了版图设计优化和流片。管芯传输线脉冲(TLP)E-SOA测试结果表明,优化后的版图使NLDMOS在5 V工作电压下TLP E-SOA提升约30%,金属引线的加宽和叠加使NLDMOS的开态电流提升约7%。带状紧凑型p^+带且双栅极嵌入的优化版图设计能更好地稳定硅衬底电位,抑制寄生三极管的开启,增大E-SOA,提高器件可靠性。因此,版图设计优化对提升功率NLDMOS的性能和可靠性具有实际意义。

The effects of layout optimization on the electrical safe operating area(E-SOA) of the power n-type laterally diffused metal oxide semiconductor(NLDMOS) were studied without adjusting fabrication process and increasing process cost. The layout design optimization and chip fabrication were carried out by studying the p^+ band embedding ways, p^+ pattern shapes, p^+ distribution densities, array cell gate width and total gate numbers, metal lead ways and so on. The transmission line pulse(TLP) E-SOA test results show that the optimized layout improves the TLP E-SOA of the NLDMOS by about 30% at the operating voltage of 5 V, and the widening and stack of the metal leads increase the on-state current of the NLDMOS by about 7%. The strip-shaped compact-type p^+ band and dual-gate fingers embedded optimized layout design can better stabilize the silicon substrate potential, suppress the opening of the parasi-tic transistor, increase the E-SOA, and improve the reliability of the device. Therefore, layout design optimization has practical significance for improving the performance and reliability of the power NLDMOS.