多层PCB介质基板中嵌入高K材料对信号完整性的影响

The Effect of High K Material Embedded in Dielectric Substrate of Multilayer PCB on Signal Integrity

采用数值仿真分析了多层PCB的电源/地平面中嵌入高K材料对过孔转换信号完整性的影响。研究了电源/地平面间的介质层整体采用高介电常数(高K)材料时信号过孔的S参数,并提出了两种局部添加高K材料的方法,一是在过孔周围布置一个包围过孔的介质柱,二是在过孔周围均匀布置若干个小介质柱。计算结果表明,介质层整体采用高K材料会引起较多的谐振,信号完整性变差;当嵌入介质材料的介电常数足够大时,在过孔周围局部嵌入高K材料的方法可明显增强信号完整性,其中,包围过孔的单个介质柱在高频时的性能良好,而在过孔周围嵌入多个小介质柱在低频时的效果较好。

In this paper, the effect of high K material embedded in power/ground planes of multilayer PCB on signal integrity (SI) of via transition was analyzed by numerical simulation. The S-parameters of singal via was investigated, when high dielectric constant (high K) material is applied to the whole substrate between power/ground planes, further more, two methods locally embedding high K material were proposed, one of which is placing one bulk high K cylinder surrounding a via, the other one is placing several discrete high K small cylinders near about a via. The obtained results shown that using high K material in all the substrate will introduce more resonant modes, therefore cause serious SI issue;When the dielectric constant of the embedded dielectric material is high enough, the locally embedding high K material methods can significantly enhance the SI performance, of which, the method that laying out one high K cylinder surrounding a via has better performance at high frequencies, while embedding several small high K cylinders around a via is more effective at low frequencies.