乱序超标量多核处理器的验证方法

Verification Method for Super Scale Multi-Core Processor

验证是芯片设计的关键环节,尤其对于高复杂度的处理器。阐述通用的处理器验证环境,紧密结合处理器设计中的关键点,提出了基于体系结构寄存器和多级缓存的验证原则,该方法应用于自主设计的X86通用处理器。

Verification is the key point of chip design, especially for processor with high complexity. A general processor verification environment is described, combine with the key point of processor design, verification principle base on architecture register and multi-level cache is proposed. This method has been successfully used to verify a self-designed X86 general processor.