两种HDB3码编码器的研究分析

The research and analysis of two HDB3 code encoders

为了研究HDB3码的编码原理,采用了两种方法来实现HDB3码编码器。方案一:先进行非0码的极性变化及带极性的插V操作,然后再进行带极性插B操作;方案二:先进行插V操作,再进行插B操作,最后再进行极性变化。最后验证可得,当时钟频率为100MHz时,虽然两种方案都能实现HDB3码的编码,并且功耗相同,但是两种方案硬件电路所占用的总逻辑单元不相同,方案二占用的总逻辑单元比方案一少9个。因此,在功耗一定的情况下,方案二优于方案一。

In order to study the coding principle of HDB3 code, two methods are used to implement HDB3 code encoder. In scheme one, polarity change of non-zero code and polarity interpolation V are carried out first, and then polarity interpolation B is carried out;in scheme two, polarity change is carried out after V and B are inserted first. Finally, the verification shows that when the clock is 100 MHz, although both schemes can realize HDB3 code coding with the same power consumption, the total logic units occupied by the hardware circuits of the two schemes are different, which the total logic units occupied by the second scheme are 9 fewer than that of the first scheme. So in the case of certain power consumption, scheme 2 is better than scheme 1.