列车MVB总线故障注入方法研究

Research on Fault Injection Method of Train MVB Bus

为了提取不同运行状态下列车通信网络的故障数据特征量,测试不同程度退化的网络性能,以便于对车载网络进行故障诊断和健康管理的研究,设计了一种基于FPGA的MVB网络故障注入设备。通过研究网络故障的发生原理,实现了MVB网络阻抗不匹配、间歇性断路、数据帧错误等故障注入;同时以锁存器(latch)亚稳态结构作为随机数熵源,提出基于"LFSR+latch"结构的真随机数生成模型,模拟偶发性、随机性故障的发生;最后搭建了MVB网络测试平台,通过采集各故障模式下的MVB网络波形数据,提取特征量,进一步验证故障注入方法的可行性。

In order to extract the characteristics of the vehicle communication network fault data in different operating states and test the network performance under different performance degradation degrees, so as to facilitate the research of network fault diagnosis and health management, a MVB network fault injection device based on FPGA was designed. By studying the generation mechanism of the vehicle network faults, fault injection such as MVB network impedance mismatch, intermittent disconnection, and data frame error was realized. At the same time, taking latch metastable structure as random number entropy source, a real random number generation model based on LFSR + latch structure was proposed to simulate the occurrence of incidental and random faults. Finally, the MVB network test platform was built to further verify the feasibility of fault injection method by collecting the MVB network waveform data and extracting feature quantities under various fault modes.