期刊文献+

一种深低温环境LVDS驱动电路 被引量:2

A LVDS Driver Circuit for Deep Low Working Temperature
下载PDF
导出
摘要 研究了深低温环境下MOS管与LVDS驱动电路的工作特性。与常温环境相比,LVDS电路在77K环境下的输出电流更大,导致输出差分信号幅值增大。MOS管在77K低温环境下的载流子迁移率为常温下的3倍,导致器件电流增大。根据低温条件下器件变化特性的数据分析结果,调节电路结构与器件参数,设置多档可调参考电流,并调节LVDS输出信号于标准范围内。采用标准0.35μm CMOS工艺进行流片验证。结果表明,LVDS驱动电路在77K环境下工作时,共模电平为1.2V,电压摆幅为400mV。 The characteristics of MOS devices and a LVDS drive circuit at deep low working temperatures was studied.LVDS driver’s output current at the working environment of 77K was higher than that ones at typical temperature,which had increased the amplitude of the LVDS driver’s differential signal.It showed that the current of the MOS transistor became larger as the carrier mobility increased by 2times at 77Kworking temperature.The structure and parameters of the circuit were adjusted according to the analysis data of the changes in characteristics of the MOS devices under low temperature conditions,and the referred currents were adjustable for multi-levels, the LVDS output signal was adjusted within the standard range.The circuit was taped out and verified in a 0.35μm standard CMOS process.The verification results showed that the LVDS driver’s common mode voltage was 1.2V, and the voltage swing was 400mV at 77Kworking temperature.
作者 蒋大钊 丁瑞军 JIANG Dazhao;DING Ruijun(Key Laboratory of Infrared Imaging Materials and Detectors,Shanghai Institute of Technical Physics,Chinese Academy of Sciences,Shanghai 200083,P.R.China;University of Chinese Academy of Sciences,Beijing100049,P.R.China)
出处 《微电子学》 CAS 北大核心 2019年第5期648-652,共5页 Microelectronics
基金 国家自然科学基金重点项目(61534006)
关键词 焦平面阵列 读出电路 低温特性 数字接口 focal plane array readout circuit low temperature characteristics digital interface
  • 相关文献

参考文献4

二级参考文献28

  • 1朱慧,李尧桥,陈新禹,方家熊.一种红外焦平面的数字化输出设计方案[J].激光与红外,2007,37(B09):997-1000. 被引量:4
  • 2CLAUS G,COLLEDANI C,DEPTUCH G,et al.Monolithic active pixel sensors for a linear collider[J].Nuclear Instruments and Methods in Physics Research,2001,473(1-2):83-85.
  • 3HU Y,SOLERE J L,LACHARTRE D,et al.Design and performance of a low-noise,low-power consumption CMOS charge amplifier for capactive detectors[J].IEEE Transactions on Nuclear Science,1998,45(1):119-123.
  • 4TEDJA S,van der SPIEGEL J,WILLIAMS H H.A CMOS lownoise and low-power charge sampling integrated circuit for capacitive detector/sensor interfaces[J].IEEE Journal of Solid-State Circuits,1995,30(2):110-119.
  • 5HU Y,DEPTUCH G,TRCHETTA R,et al.A low-noise,low-power CMOS SOI readout front -end for silicon detectors leakage current compensation with capability[J].IEEE Transactions on Circuits and Systems-Ⅰ:Fundamental Theory and Applications,2001,48(8):1022-1030.
  • 6RANDAZZO N,RUSSO G V,PRESTI D L,et al.A four-channel,low-power CMOS charge preamplifier for silicon detectors with medium value of capacitance[J].IEEE Transactions on Nuclear Science,1997,44(1):31-35.
  • 7BAKER R J,LI H W,BOYCE D E.CMOS Circuit Design,Layout,and Simulation[M].New York:John Wiley,1998.
  • 8RAZAVI B.Design of Analog CMOS Integrated Circuits[M].New York:McGraw-Hill,2001.
  • 9GUO C,SCHMITT P,DEPTUCH G,et al.A fully integrated,low noise and low power BiCMOS front-end readout system for capacitive detectors[J].International Journal on Analog Integrated Circuits and Signal Processing,2001,28(3):211-223.
  • 10WURTZ L T,WHELESS W P Jr.Design of a high-performance,low noise charge preamplifier[J].IEEE Trans Circuits Syst Ⅰ,1993,40(8):541-545.

共引文献24

同被引文献22

引证文献2

二级引证文献1

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部