基于FPGA的BP神经网络识别系统设计

Design of Neural Network Identification System Based on FPGA

针对神经网络算法通常采用软件编程实现所存在的缺点,本文主要对基于现场可编程门阵列(field programmable gate array,FPGA)的硬件BP神经网络识别算法实现进行研究。给出了BP神经网络原理,设计了一个识别MNIST手写数字的3层反向传播算法(back propagation,BP)神经网络识别系统。为测试该电路的识别准确率,选取MNIST数据集中的100个测试数据,采用Verilog语言设计,在FPGA开发平台Quartus II 13.0和Modelsim中,对该电路的识别准确率进行仿真测试。仿真结果表明,输出数字识别准确率约85%,可用于简单的模式识别系统中。该研究为进一步实现硬件神经网络训练系统奠定了理论基础。

The neural network algorithm exists shortcomings as it usually uses software progranmming.This paper mainly studies the implementation of hardware BP neural network recognition algorithm based on FPGA(Field Programmable Gate Array).It gives the principle of BP neural network,and designs a 3-layer BP(back propagation)neural network identification system that recognizes MNIST handwritten digits.In order to test the recognition accuracy of the circuit,the system selects 100 test data in the MNIST data set.The system is designed in Verilog language,and the recognition accuracy of the circuit is simulated and tested in the FPGA development platform Quartus II 13.0 and Modelsim.The simulation results show that the output digital recognition accuracy is about 85%,which can be used in a simple pattern recognition system.This research laid a theoretical foundation for further realizing the hardware neural network training system.