基于FPGA的CNN加速器设计与实现

Design and implementation of CNN accelerator based on FPGA

近年来,卷积神经网络(CNN)在计算机视觉任务中得到了广泛的应用,可编程逻辑门阵列(FPGA)以其高性能、高能效、高灵活性等优点被广泛应用于CNN的加速。提出了一种基于FPGA的卷积神经网络加速器的设计与实现方法,以期在资源和功耗受限的平台中为CNN的计算提供加速。以VC707开发板为FPGA平台,设计了一种新的卷积神经网络DoNet,可以实现对Minist手写数据集的识别分类。测试结果表明,基于FPGA实现的DoNet对Minist数据集的识别准确率为95%,测试显示的识别时间为0.545 ms,功耗为1.95 W。

In recent years,convolutional neural network(CNN)has been widely used in computer vision tasks.And field programmable gate array(FPGA)is widely used in CNN acceleration due to its high performance,high energy efficiency,high flexibility and other advantages.This paper presents a design and implementation method of convolutional network accelerator based on FPGA,in order to provide acceleration for CNN computing in resource and power constrained platforms.This paper takes VC707 development board as FPGA platform,designs a new convolutional neural network named DoNet,which can realize the recognition and classification of Minist handwritten data set.The test results show that the recognition accuracy of DoNet based on FPGA is 95%,the recognition time shown in the test is 0.545 ms,and the power consumption is 1.95 W.