180 nm CMOS微处理器辐照损伤剂量的实验研究

Experimental study on irradiation damage dose of 180 nm CMOS MCU

以180 nm互补金属氧化物半导体(Complementary Metal Oxide Semiconductor, CMOS)工艺制造的STM32微处理器为实验对象,设计了由被测最小系统电路、剂量计、通讯电路和上位机组成的总剂量效应实验条件。利用60Co源分别在63.3 Gy(Si)·h^-1和101.2 Gy(Si)·h^-1剂量率下,对14个实验样品进行了在线辐照,通过数据校验实时判断受照样品的功能运行状态;在227.2~855.0 Gy(Si)累积剂量范围内,对75个实验样品进行了离线辐照,对比样品受照前后的功能运行状态。实验结果表明:片内FLASH存储器是STM32微处理器中最先损伤的硬件单元;受照前后,STM32微处理器各引脚的对地阻抗以及片内模拟数字转换器输出值基本无变化,功耗电流略有增加。63.3 Gy(Si)·h^-1和101.2 Gy(Si)·h^-1在线照射条件下辐照损伤剂量分别为(235.4±16.4)Gy(Si)和(197.4±13.0)Gy(Si);离线照射条件下的辐照损伤剂量介于391.5~497.6 Gy(Si)之间。

[Background] The radiation effects of semiconductor devices include single event upset effect, total ionizing dose effect and dose rate effect. The total ionizing dose effect on electronic systems becomes a priority for the improvement of reliability of radiation-tolerance robots. [Purpose] This study aims to measure the irradiation damage dose of STM32 microcontroller unit fabricated by 180 nm complementary metal oxide semiconductor(CMOS) technology with on-line and off-line experimental testing approaches. [Methods] A test system which consisted of minimum circuits, dosimeter, communication circuit and host computer was developed. On-line and offline irradiation experiments were performed on 89 samples using60 Co source with different dose rates. Among these samples, 14 samples were on-line irradiated under 63.3 Gy(Si) · h^-1 and 101.2 Gy(Si) · h^-1 dose rates whilst 75 samples were off-line irradiated under dose rates range of 227.2 Gy(Si) · h^-1 to 855.0 Gy(Si) · h^-1. [Results] The irradiation damage dose are(235.4±16.4) Gy(Si) and(197.4±13.0) Gy(Si), respectively, corresponding to the on-line testing with 63.3 Gy(Si) · h^-1 and 101.2 Gy(Si) · h^-1 dose rates. The irradiation damage dose of off-line testing is between 391.5 Gy(Si) and 497.6 Gy(Si). [Conclusions] On chip flash memory is the first damaged hardware unit in STM32 microprocessor, and the tolerant dose limit of off-line test is significantly higher than that of on-line test.