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基于LC阻抗网络降低芯片信号反射的方法研究 被引量:2

Research on the Method of Reducing Signal Reflection in Circuit Chip Based on LC Impedance Network
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摘要 为了降低电路在更高速率工作时的信号反射,任意给定0~100 GHz范围内的频率点,引入LC阻抗网络,分析其适用范围并求解各给定频率点对应的LC网络,最后,在常规互连线模型的终端门电容处就近接入LC网络,使得互连线的输入阻抗与其特性阻抗相当,从而保证了信号传输路径的阻抗连续性。与阻抗匹配前比较,各给定频率点及其附近一定带宽的反射系数都有效降低,从而验证了LC网络对降低高频信号反射的正确性。基于LC网络的匹配方法同样适用于多处阻抗不连续的多层芯片结构。 In order to reduce signal reflection of circuit chip when operating at a higher rate, frequency points in the range of 0-100 GHz are given arbitrarily, and then the LC impedance network is introduced, and applicable range is analyzed and LC network corresponding to each given frequency point is solved. Finally, LC network is connected to the terminal gate capacitance of conventional interconnect model so that input impedance of interconnect is equivalent to its characteristic impedance, thereby ensuring impedance continuity of the signal transmission path. Comparing the matching with the pre-matching, reflection coefficients of a certain frequency point and its certain bandwidth are effectively reduced, which verifies correctness of the LC network to reduce reflection of high frequency signals. The LC network-based matching method is also applicable to multiple multilayer chip structures with discontinuous impedance.
作者 梅燃燃 潘中良 MEI Ranran;PAN Zhongliang(College of Physics and Telecommunications Engineering,South China Normal University,Guangzhou 510006,China)
出处 《电子与封装》 2019年第11期31-36,共6页 Electronics & Packaging
基金 广州市科技计划项目(201904010107) 广东省科技计划项目(2016B090918071)
关键词 电路芯片 信号反射 互连线 输入阻抗 特性阻抗 阻抗匹配 circuit chip signal reflection interconnect line input impedance characteristic impedance impedance matching
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