并行分布式LMS自适应滤波器的FPGA实现

FPGA Implementation of Parallel Distributed LMS Adaptive Filter

FPGA因为相较于传统的ASIC拥有许多优势,在该领域的重要性也在不断提高。为了保证基于LMS自适应数字滤波器在硬件上的高效实现,使用无乘法结构的实现方案能够获得更好的效果。FPGA实现自适应数字滤波器的复杂性取决于乘法累加(MAC)的操作数量,而使用并行分布式算法通过使用查找表(LUT)替代乘法累加运算,能够显著降低硬件实现的复杂性,并且能减少逻辑资源的利用率,同时利用FPGA并行处理的优势,可以提高运行速度。所提出的方法通过软件仿真证明其有效性和优越性。

FPGA has many advantages over traditional ASIC,and its importance in this field is also increasing.In order to ensure the efficient implementation of adaptive digital filter based on LMS in hardware,the implementation scheme with no multiplication structure has better effect.The complexity of FPGA implementation of adaptive digital filter depends on the number of operations of multiplication and accumulation(MAC).Using parallel distributed algorithm can significantly reduce the complexity of hardware implementation and reduce the use of logical resources by using LUT instead of multiplication and accumulation.At the same time,using the advantages of FPGA parallel processing can improve the running speed.The proposed method is proved to be effective and superior by software simulation.