摘要
为使RISC处理器平台具备检测代码重用攻击的能力,将控制流完整性机制与可信计算中的动态远程证明协议相结合,提出面向RISC处理器的硬件辅助控制流认证方案。以开源RISC处理器为基础,扩展与处理器紧耦合的硬件监控单元,同时给出控制流认证方案的证明协议,设计用于跟踪执行路径的硬件编码方法以实现信息压缩。实验结果表明,与C-FLAT方案相比,该方案传输延时小且资源消耗少,能够保证RISC处理器控制流的可信安全。
To enable RISC processor platforms to detect code reuse attacks,this paper proposes a hardware-assisted control flow authentication scheme for RISC processors,integrating Control Flow Integrity(CFI)mechanism with dynamic remote attestation protocols in trusted computing.Based on open-source RISC processors,the scheme extends hardware monitoring units that are tightly coupled with processors,and gives an attestation protocol of the control flow authentication scheme.It also designs a hardware encoding method for execution path tracking to compress information.Experimental results show that compared with the C-FLAT scheme,the proposed scheme can reduce transmission delay and resource consumption,and can ensure trusted security of control flows in RISC processors.
作者
李扬
戴紫彬
李军伟
LI Yang;DAI Zibin;LI Junwei(Information Engineering University,Zhengzhou 450001,China)
出处
《计算机工程》
CAS
CSCD
北大核心
2019年第12期134-140,146,共8页
Computer Engineering
基金
国家高技术研究发展计划
关键词
代码重用攻击
控制流完整性机制
远程证明
硬件
安全处理器
code reuse attack
Control Flow Integrity(CFI)mechanism
remote attestation
hardware
security processor