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用于3.3 V电源静电防护的闩锁免疫LVTSCR

A Latch-Up Immune LVTSCR for ESD Protection in 3.3 V Power Circuit
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摘要 传统LVTSCR的维持电压过低,器件容易受到闩锁效应的影响而无法正常关断。为了提高传统LVTSCR的维持电压,基于0.18μm BCD工艺,提出一种内嵌P型浅阱的新型LVTSCR(EP-LVTSCR)。采用Sentaurus TCAD,对提出的器件进行建模和测试。结果表明,该EP-LVTSCR的维持电压从传统LVTSCR的1.52 V提升到3.85 V,具有免疫闩锁效应的能力,可应用于3.3 V电源的ESD防护。 Low voltage triggering silicon-controlled rectifier(LVTSCR)is widely used in ESD protection applications as its high ESD robustness and lower triggering voltage.However,with low holding voltage,the conventional LVTSCR is susceptible from the latch-up effect,which will cause the ESD devices cannot be normally turned off.A new LVTSCR embedded with a shallow P-type well(EP-LVTSCR)was designed in a 0.18μm BCD process for higher holding voltage.The proposed structure was modeled and tested on Sentaurus TCAD simulation.The experiment results showed that,compared with the conventional LVTSCR,the holding voltage of the proposed EP-LVTSCR was increased from 1.52 V to 3.85 V.The new structure was expected to be utilized in 3.3 V power circuits as an ESD protection device,which could immune the latch-up effect.
作者 杨波 杨潇楠 陈磊 陈瑞博 李浩亮 YANG Bo;YANG Xiaonan;CHEN Lei;CHEN Ruibo;LI Haoliang(School of Information Engineering,Zhengzhou University,Zhengzhou 450000,P.R.China)
出处 《微电子学》 CAS 北大核心 2019年第6期838-841,846,共5页 Microelectronics
基金 国家自然科学基金资助项目(61874099)
关键词 静电放电 维持电压 LVTSCR 闩锁效应 TCAD仿真 ESD holding voltage LVTSCR latch-up effect TCAD simulation
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