基于FPGA+MPC8260内核的微纳卫星地面站通信机设计

Design of micro-nano satellite ground station communication machine based on FPGA+MPC8260 core

针对低轨微纳卫星星地通信信道短时突发、高动态的特点,设计了基于FPGA+MPC8260内核的地面站通信机。通信机使用FPGA芯片实现信号的调制与解调,使用MPC8260芯片完成通信机的数据管理以及与上位机的交互。通信机上行链路基于AFSK调制,上行信号的发送采用FSK/FM二次调制的方法。下行链路基于BPSK解调,针对下行信号的短时突发性以及由于星地间的相对高速运动产生的多普勒频移,本文设计了一种开环结构的解调器,结合SGP4模型,根据低轨卫星的轨道对接收时刻地面站收到的卫星信号频率进行预估,以补偿校正本地载波频率。测试表明,通信机上行链路杂散抑制大于50 dBc,下行链路载波校正误差在300 Hz以内,满足通信机性能要求。

Aiming at the short-term burst and high dynamic characteristics of low-orbit micro-nano satellite channels,the ground station communication machine based on FPGA + MPC8260 core is designed. The communication machine uses FPGA chip to realize signal modulation and demodulation,and uses MPC8260 chip to complete the data management of the communication machine and the interaction with the host computer. The uplink of the communication machine is based on the AFSK modulation,and the uplink signal is transmitted using the FSK/FM secondary modulation method. The downlink is based on the BPSK demodulation. For the short-term burst of satellite downlink signals and the Doppler shift due to the relatively high-speed motion between the satellite and ground station,this paper designs an open-loop structure demodulator. Combined with the SGP4 model,the frequency of the satellite signal received by the ground station at the time of reception is estimated according to the orbit information of the low-orbit satellite to compensate the local carrier frequency. Tests show that the transmitter’s uplink spur suppression is greater than 50 dBc,and the downlink carrier correction error is within 300 Hz,meeting the performance requirements of the communication machine.