基于UVM验证方法学的数字交换芯片验证平台

UVM-Based Verification Platform for Digital Switch Chip

采用统一验证方法学(universal verification methodology,UVM)搭建验证平台,对数字交换芯片的功能进行验证[1]。由于数字交换芯片的数据处理量较大,验证平台产生受约束的随机激励来验证数字交换芯片的功能,并通过代码覆盖率和功能覆盖率来完善验证用例。仿真结果表明,通过该验证平台验证数字交换芯片的功能正确,功能覆盖率达到100%,并通过机台测试。

In the paper, A verification platform for digital switch chip is developed by using universal verification methodology(UVM). Due to large data processing capacity, the verification platform generates constrained random stimulus to verify the functions of this digital switch chip, and code coverage and function coverage is utilized to improve verification platform. The simulation results show that the functions of this digital switch chip are correct, with 100% of the ratio of function coverage, and also can pass machine test.