WiNoC中拥塞避免的低功耗路由器设计

Low power router design for congestion avoidance in WiNoC

无线片上网络中无线路由器承担着大量的数据通信任务,容易产生拥塞,影响网络性能。基于此,设计了一种拥塞避免的低功耗路由器。首先,在无线接收缓冲区与路由器的输入缓冲区之间添加数据包分流模块,将无线接收端的大量数据包,存储到空闲端口输入缓冲区;其次,添加全局仲裁模块,授权无线发送端口拥塞度较高的无线路由器,优先使用无线信道;最后,对无通信任务的无线收发器组件进行功率门控。实验结果表明,该方案使得网络的吞吐率最多增加了25%,网络延时最多降低40%,功耗最多降低33.87%,面积开销稍有增加。该设计有针对性地解决了高负载引起的无线收发端拥塞问题,提升了网络整体性能。

Wireless routers in wireless network-on-chip(WiNoC) undertake a large number of data communication tasks, which are prone to congestion and affect network performance. Thus, a high-performance congestion-aware low power router design scheme is proposed. Firstly, a data packet shunting module is added between the wireless receiving buffer and the input buffer, which stores a large number of data packets at the wireless receiving end into the input buffer of the idle port. Secondly, the global arbitration module is added to authorize the wireless router with higher congestion of the wireless sending port accessing to wireless channel. Finally, power gating is applied to wireless transceiver components without communication tasks. The experimental results show that the proposed scheme increases the throughput of the network by 25%, decreases the network delay by 40%, reduces the power consumption by 33.87%, and increases the area overhead slightly. This design specifically mitigates high loading caused congestion in wireless-in and out ports, improves overall network performance.