功耗分析下的密码芯片设计规范研究

The research of design speci fication for cryptographic chips against poweranalysis

密码芯片中有复杂的加解密算法和密钥保护机制,然而在计算过程中密码芯片的功率泄露却与所操作的密钥相关。攻击者利用统计学进行功率泄露分析,则可逐步解析出密码芯片所操作的密钥,从而破解整个系统。为了解决这个问题,许多抵御功耗分析攻击的安全算法与安全实现技术相继提出,但是很少有针对这一套安全防护技术设计规范的研究。文章给出了密码芯片安全算法的一套设计规范,分别基于算法设计维度规范和硬件设计维度的设计规范,来改变功率消耗的特征。这种设计规范除了能为密码芯片企业提供芯片设计的效率和安全性技术支撑外,还能指导和规范其在产品投放市场前得到系统的测试、评估和设计,免除了一旦出现安全问题后给用户和厂商带来巨额损失。

There are complex encryption and decryption algorithms and key protection mechanisms in cryptographic chips.However,the power leakage of cryptographic chips in the calculation process is related to the key operation.The attacker uses statistics to analyze the power leak,and they can gradually resolve the key operated by the cryptographic chip,until they can crack the whole system.To solve this problem,many security algorithms and security implementation techniques against power analysis attacks have been proposed,but there is no research on the design specifications of this set of security protection technologies.This paper presents a set of design specifications for cryptographic chip security algorithms.Based on the design specifications of time dimension and amplitude dimension,the characteristics of power consumption are changed.In addition to providing technical support for the efficiency and security of chip design for cryptographic chip enterprises,this design specification can also guide and standardize the systematic testing,evaluation and design of cryptographic chip enterprises before their products are put into the market,and avoid huge losses of users and manufacturers once security problems arise.