一种基于gm/I_D参数的运算放大器设计方法

A gm/I_D Methodology for CMOS OTA Design

介绍一种基于gm/I_D参数的模拟集成电路设计优化方法,通过建立gm/I_D参数与栅源电压和标准化电流查找表,能够快速确定器件参数,简化计算,缩短设计周期。与传统设计方法相比具有适用于MOS管所有工作区域、满足低功耗要求等优点。基于Cadence Spectre 0.5μm工艺对电路进行设计优化仿真,仿真结果表明,该方法进行的手工估算与仿真值的误差在可接受范围以内,达到设计要求。

This paper introduces a kind of analog integrated circuit design and optimization methodology based on the gm/I_D parameter, through establishing the gm/I_D parameter versus the gate-source voltage and the normalized current lookup tables, designer can quickly determine the device parameters, simplify the calculation,shorten the design cycle.Compared with the traditional design method,it is suitable for all operation regions, meet the demands of low power MOS transistors. Simulation and optimization based on Cadence Spectre 0.5μm process showed that this methodology can minimize the error between manual and simulation under the acceptable range and satisfies the desired specifications.