一种应用于低电压GPS接收机的高线性度低噪声放大器

A high linearity LNA for low voltage GPS receiver

基于0.18μm RFCMOS工艺,设计了一种应用于低电压GPS接收机的高线性度低噪声放大器。采用体偏压控制的跨导导数叠加技术,有效改善了低噪声放大器的线性度,显著提高了辅助管的调节精度。通过在输入端主放大管的栅源两端并联电容的方法,降低二次谐波对三阶交调失真的影响,进一步改善了线性度。同时,折叠式共源共栅的拓扑结构,降低了电路的工作电压。仿真结果表明,在0.9 V供电下,工作频率为1.575 GHz时,该低噪声放大器的输入三阶交调点为6.63 dBm,噪声系数为1.53 dB,增益为13.16 dB,输入回波损耗和输出回波损耗分别为-32. 43 dB和-24. 58 dB,功耗为8. 78 mW。

Based on 0.18 μm RFCMOS technology, a high linearity low noise amplifier(LNA) for low voltage GPS receivers was designed.By using the trans-conductance derivative superposition technique with bulk bias control, the adjustment accuracy of auxiliary transistor was remarkably improved.An extra capacitance is added between gate and source nodes of input transistor in a parallel manner to reduce the effect of second-order harmonic on IMD3.In addition, folded cascade structure is adopted to make the circuit work under low voltage conditions.The simulation results shown that the LNA achieves a 6.63 dBm IIP3, a noise figure of 1.53 dB, a 13.16 dB power gain, the input and output return losses are-32.43 dB and-24.58 dB at 1.575 GHz with the core LNA consuming 8.78 mW at 0.9 V power supply.