摘要
传统硅(Si)基集成电路制造工艺已经进入7 nm节点,继续减小器件尺寸变得愈发困难.半导体材料锗(Ge),具有比硅更高的载流子迁移率,能够实现器件性能的大幅提升.本文从栅极堆垛(gate stack)、源漏工程(source/drain engineering)和新器件结构(new device structures) 3个角度总结了Ge器件的最新研究成果.研究表明,锗沟道器件中诸多关键科学和工程问题仍未得到有效解决,从基本的器件制备工艺到深层次的器件物理问题都亟待深入研究与克服.但是, Ge器件是未来集成电路5 nm及以下技术节点最有希望的发展方向.
The modern integrated circuit is among the world’s most complex systems, but at its heart is a very simple, and we think beautiful, device: the transistor. Right now, 7 nm process technology is the cutting edge in traditional silicon-based integrated-circuit-manufacturing industry. However, the downscaling of the technological node in accordance with Moore’s Law is becoming increasingly difficult, not to mention fantastically expensive. Ge has been considered a promising channel material due its high hole and electron motilities, which facilitate the drive-current boost without downscaling the device’s dimensions. This paper summaries the current state-of-the-art Ge metal-oxide-semiconductor field-effect transistors(MOSFETs) from these three angles: gate stacks, source/drain formation, and new device structure. It is found that many critical physical and engineering problems concerning Ge MOSFETs are still under discussion, including basic device fabrication and the deep physical understanding of Ge MOSFETs. Nevertheless, Ge MOSFETs reported by both academic and industrial researchers show superior performance to traditional Si MOSFETs, suggesting that Ge is a promising material for future high-performance complementary-MOS(CMOS) devices under 3 nm node.
作者
赵毅
郑泽杰
李骏康
Yi ZHAO;Zejie ZHENG;Junkang LI(College of Information Science&Electronic Engineering,Zhejiang University,Hangzhou 310027,China;Zhejiang Lab,Hangzhou 310000,China)
出处
《中国科学:信息科学》
CSCD
北大核心
2020年第2期163-183,共21页
Scientia Sinica(Informationis)
基金
浙江省自然科学基金重点项目(批准号:Z19F040002)
浙江省重点研发计划(批准号:2019C01158)资助项目
关键词
锗
栅极堆垛
源漏技术
新器件结构
Ge
gate stacks
source and drain formation
new device structure