摘要
讨论高速PCB设计中的延时、反射、串扰、振铃等信号完整性问题,针对TCN网关CPU板的400 MHz DDR时钟差分信号模型,结合Polar SI9000工具进行差分特性阻抗分析和计算,设置合适的约束规则控制PCB布局布线,从各个环节保证差分信号的阻抗匹配和高速电路的信号完整性。
This paper discusses the signal integrity problems in high-speed PCB design,such as delay,reflection,crosstalk,ringing,etc.Aiming at the differential signal model of 400 MHz DDR clock of TCN gateway CPU board,the differential characteristic impedance analysis and calculation are carried out in combination with Polar SI9000 tool,and appropriate constraint rules are set to control PCB layout and wiring,so as to ensure the impedance matching of differential signals and signal integrity of high-speed circuit from each link.
作者
石小磊
阎东
周达
SHI Xiaolei;YAN Dong;ZHOU Da(CRRC Dalian Electric Traction R&D Center,Dalian 116052,China)
出处
《铁道机车与动车》
2020年第2期10-13,17,I0003,共6页
Railway Locomotive and Motor Car