期刊文献+

NLDMOS器件性能优化及分析 被引量:2

Performance Optimization and Analysis of NLDMOS Devices
下载PDF
导出
摘要 提出一种改善n型横向双扩散金属氧化物半导体(NLDMOS)器件性能的工艺方法。该方法基于某公司0.18μm标准工艺流程,通过在NLDMOS的共源处增加一道离子注入,引出衬底电荷,以优化NLDMOS器件的击穿电压(Vb)与比导通电阻(Rsp)。选择不同的注入离子浓度与快速热退火时间,研究了器件的Vb与Rsp变化。由于离子激活效率不足,单纯增加20%的注入离子浓度,器件的耐压性能提升极小,采用增加20%注入离子浓度结合延长20s快速热退火时间的方法,NLDMOS器件的Vb提高约2.7%,同时Rsp仅增加0.9%左右。 A new process for improving the performance of n-LDMOS devices is proposed based on XXX’s 0.18μm standard process flow.Adding an ion implantation at the common source of NLDMOS can extract the substrate charge and optimize the breakdown voltage(BV)and specific on-resistance(Rsp)of the NLDMOS devices.In this paper,by selecting different implant ion concentrations and rapid thermal annealing time,changes of BV and Rspof the devices are studied.Because the ion activation efficiency is insufficient,simply increasing the implant ion concentration by 20%,the withstand voltage performance of the device has less improvement.By combining 20%increase in implant ion concentration with 20 srapid thermal annealing method,the BV of the NLDMOS device is increased by about 2.7%,while the Rspis increased by only about 0.9%.
作者 李维杰 王兴 王云峰 李洋 孟丽华 LI Weijie;WANG Xing;WANG Yunfeng;LI Yang;MENG Lihua(School of Microelectron.,University of Chinese Academy of Sciences,Beijing 100029,CHN;Semiconductor Manufacturing Inter.Corp.,Tianjin 300385,CHN)
出处 《半导体光电》 CAS 北大核心 2020年第1期99-102,140,共5页 Semiconductor Optoelectronics
关键词 NLDMOS 击穿电压 比导通电阻 离子注入 快速热退火 NLDMOS breakdown voltage Rsp ion implant RTA
  • 相关文献

参考文献4

二级参考文献16

  • 1Murari B. Smart power technologies evolution [A].Industry Applications Conf [C]. Rome, Italy. 2000.10-15.
  • 2Contiero C. Characteristics and applications of a 0.6 μm Bipolar-CMOS-DMOS technology combining VLSI non-volatile memories [A]. IEEE Int Elec Dev Meeting [C]. San Francisco, CA, USA. 1996. 465-468.
  • 3Jacob A. A-BCD:an economic 100 V RESURF silicon- on insulator BCD technology for consumer and automotive applications [A]. ISPSO, Toulouse,France. 2000. 327-330.
  • 4Kim J. High-voltage power integrated circuit technology using SOI for driving plasma display panels [J].IEEE Trans Elec Dev, 2001, 48(6):1256-1258.
  • 5Moscatefi. LDMOS implementation in a 0.35 μm BCD technology (BCD 6 ) [A]. ISPSO[C]. Toulouse,France,2000. 323-326.
  • 6Contiero C, Andreini A, Galbiati P. Roadmap differentiation and emerging trends in BCD yechnology [A].ESSDERC[C]. Florence,Italy. 2002,276-280.
  • 7Kawai F, Onishi T, Kamiya T. Multi-voltage SOI-BICDMOS for 14 V & 42 V automotive applications [A]. Proc 2004 Int Symp Power Semicond Dev & ICs[C]. Kitakyushu, Japan. 2004. 165-168.
  • 8Labate L, Moscatelli A. Robust and performing RF LDMOS device integrated in a VLSI BCD silicon technology [A]. IEEE Radio Frequency Integrated Circults Symp[C]. Philadelphia, PA, USA. 2003. 159-161.
  • 9Moscatelli A, Mi C, Tolomeo V. A 12 V Complementary RF LDMOS technology developed on a 0.18 μmCMOS platform [A]. Proc 2004 Int Syrup Power Semicond Dev & ICs [C]. Kitakyushu, Japan. 2004.38-40.
  • 10R A Bianchi, F Monsieur, F Blanchet, C Raynaud, O Noblanc. High Voltage Devices Integration into Advanced CMOS Technologies[C]. IEDM, 2008:137-140.

共引文献13

同被引文献1

引证文献2

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部