基于FPGA的分数倍抽取滤波器的改进设计与应用

Improved Design and Application of Fractional Multiple Decimation Filter Based on FPGA

为了滤除医学超声成像系统中数据采集的噪声,提高图像的完整度,保证图像实时显示帧率及减少FPGA硬件资源的占用,在传统的FIR分数倍抽取滤波器的基础上,提出了一种改进结构。此结构仅利用一个乘法器,解决了传统结构中资源占用多,插值、抽取操作效率低等问题,提高了系统的工作效率和稳定性。通过Matlab、Vivado、Questasim仿真测试及系统成像对比,验证了此结构的可行性,与其他结构滤波器相比,减少了对Dsp、Bram等硬件资源的占用,以满足系统的实际需求。

In order to filter out the noise of data acquisition in medical ultrasound imaging system,improve the integrity of the image,ensure the real-time display frame rate of the image and reduce the occupation of FPGA hardware resources,an improved structure is proposed based on the traditional FIR fractional decimation filter.This structure only utilizes a multiplier,which solves the problem of high resource occupation,low interpolation and extraction operation efficiency in the traditional structure,and improves the working efficiency and stability of the system.Through Matlab,Vivado,Questasim simulation test and system imaging comparison,the feasibility of this structure is verified,and compared with other structural filters,the occupation of hardware resources such as Dsp and Bram is reduced to meet the actual needs of the system.