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倒装焊塑封翘曲失效分析 被引量:6

The Warpage Failure Analysis of Flip-Chip Plastic Package
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摘要 随着集成电路引出端数量的急剧提升,倒装焊型塑料封装能够满足集成电路I/O数量增加、封装的体积/重量减小和高频性能提高等发展需求。然而受封装材料间的热膨胀系数不匹配、封装结构等因素的影响,倒装焊塑封电路可能出现翘曲、分层等问题,从而严重地影响电路的可靠性。对影响倒装焊塑封电路翘曲的关键因素(材料特性、厚度等)进行了研究,针对某款FC-PBGA668电路,采用ANSYS仿真分析软件,对电路参数进行了仿真优化,并进行了实验验证,结果表明,采用仿真与实验相结合的方式,可以有效地控制和优化封装翘曲度,对于保障倒装焊塑封电路的可靠性具有重要的意义。 With the sharp increase in the number of integrated circuit terminals, filp chip plastic packages can meet development needs such as the increase in the number of integrated circuit I/O, the reduction in package size/weight, and the improvement in high frequency performance. However, due to factors such as CTE mismatching between packaging materials and packaging structure, the FC plastic circuit may have warpage, delamiration and other problems,which seriously affects the reliability of the circuit. The key factors( including material characteristics, thickness, etc.) affecting the warpage of FC plastic circuit are studied,and for a FC-PBGA668 circuit, its parameters are simulated and optimized by using ANSYS simulation analysis software, and the experimental verification is carried out. The results show that the package warpage can be effectively controlled and optimized by the combination of simulation and experiment, which is of great significance to ensure the reliability of the FC plastic circuit.
作者 高娜燕 陈锡鑫 仝良玉 陈波 李耀 欧彪 GAO Nayan;CHEN Xixin;TONG Liangyu;CHEN Bo;LI Yao;OU Biao(The 58th Research Institute of CETC,Wuxi 214000,China;Wuxi ZhongWei High-tech Electronics Co.,Ltd.,Wuxi 214035,China;ShenZhen State Microelectronics Co.,Ltd.,Shenzhen 518057,China)
出处 《电子产品可靠性与环境试验》 2020年第2期61-65,共5页 Electronic Product Reliability and Environmental Testing
关键词 倒装芯片球栅格阵列 翘曲 塑封基板 热膨胀系数 失效分析 FC-PBGA warpage plastic package CTE failure analysis
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  • 1葛增杰,顾元宪,王宏伟,靳永欣.电子封装件受热载荷作用有限元数值模拟分析[J].大连理工大学学报,2005,45(3):320-325. 被引量:13
  • 2田民波,梁彤翔,何卫.电子封装技术和封装材料[J].半导体情报,1995,32(4):42-61. 被引量:38
  • 3韩潇,丁汉,盛鑫军,张波.CSP封装Sn-3.5Ag焊点的热疲劳寿命预测[J].Journal of Semiconductors,2006,27(9):1695-1700. 被引量:9
  • 4葛增杰,顾元宪,靳永欣,赵国忠.PBGA封装体的热-结构数值模拟分析及其优化设计[J].大连理工大学学报,2006,46(5):633-640. 被引量:5
  • 5Gonzalez M, Vanden B M. Finite element analysis of improved wafer level package using silicone under bump(SUB) layers [A]. Thermal and Mechanical Simulation and Experiments in Microelectronics and Microsystems, 2004 [C]. Brussels: Proceedings of the 5th Int Conf, 2004. 163-168.
  • 6Van D W D, Janssen J H J. On wire failures in micro-electronic packages [A]. Thermal and Mechanical Simulation and Experiments in Microelectronics and Microsystems, 2004 [C]. Brussels: Proceedings of the 5th Int Conf, 2004. 53-57.
  • 7Qiang Y, Tadahiro S. The effect of voids on thermal reliability of BGA lead free solder joint and reliability detecting standard [A]. Thermal and Thermomechanical Phenomena in Electronics Systems, 2006 [C]. San Dicgo, CA, USA: ITHERM '06. The Tenth Int Conf, 2006. 1024-1030.
  • 8Anand L. Constitutive equation for hot working of metals [J]. Intern J Plasti, 1985, (1): 213-231.
  • 9Engelmaeier W. Fatigue life of leadless chip carrier solder jionts during power cycling [J]. IEEE Trans CHMT, 1983, 6(3): 232-237.
  • 10SilflaoutR. B. R, etal. State-of-the-art on thermo-mechanical modelingoflCback-endprocesses[C]. In:Proceedings ofthe 2nd International Conference EurosimE, Paris, France 2002 : 277-289.

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