摘要
为了降低嵌入式硬件在实现CNN推理运算中的外部访存以及内部存储需求,提出了一种基于FPGA平台的高数据重用CNN计算结构——HDCS。通过对CNN计算数据进行一维分割以及存储控制,使数据可以在模块的计算中固定,实现时间与空间维度上的数据重用。使输入特征数据可以在一次访存后可最少连续运算2次,有效降低了嵌入式CNN加速器对片外存储的访问次数以及片内存储资源的需求数量,在嵌入式平台人工智能技术的应用中具有一定价值。
In order to reduce the external memory access and internal storage demand of embedded hardware in realizing CNN reasoning operation,a high data reuse CNN computing structure based on FPGA platform-HDCS is proposed.Through one-dimensional segmentation and storage control of the CNN calculated data,the data can be fixed in the calculation of the module,and the data reuse in time and space dimension can be realized.The input characteristic data can be processed for at least 2 times after a memory access,which effectively reduces the accesses to off-chip storage and the number of in-chip storage resources.This structure has certain value in the application of embedded platform artificial intelligence technology.
作者
聂宇琛
唐雪寒
马瑶
马钟
李申
Nie Yuchen;Tang Xuehan;Ma Yao;Ma Zhong;Li Shen(Xi'an Microelectronics Technology Institute,Xi'an 710054,China)
出处
《单片机与嵌入式系统应用》
2020年第5期22-25,28,共5页
Microcontrollers & Embedded Systems