摘要
基于0.7μm、ft=280 GHz的InP异质结双极晶体管(HBT)工艺设计了一款12位6 GS/s的电流舵型数模转换器(DAC)。通过改进电流源开关结构,增大了输出阻抗和稳定性;在DAC输出端引入去毛刺(Deglitch)电路,可以有效消除高速DAC开关切换期间产生的毛刺,从而提升电路无杂散动态范围(SFDR)。仿真结果表明,电路实现了0.75 LSB的DNL和0.5 LSB的INL,去毛刺电路可以在高频下将DAC的SFDR提升10 dB,并且在整个奈奎斯域内实现SFDR>63 dB,极大地提升了DAC的动态特性。
The paper presents a 12 bit 6 GS/s current-steering digital-to-analog converter(DAC)based on a 0.7μm ft=280 GHz InP heterojunction bipolar transistor(HBT)technology.Current switch uses the new architecture to enlarge output impedance and make it stability.Besides,Deglitch circuit is used in DAC output to eliminate glitches generated during DAC switch flip,which can optimize the spurious-free-dynamic-range(SFDR).Simulation results show that the chip achieves a DNL/INL of 0.75/0.5 LSB respectively.The Deglitch circuit can increase the SFDR of the DAC by 10 dB at high frequencies,and achieve SFDR>63 dB over the whole Nyquist region,greatly improving the dynamic performance of the DAC.
作者
王铭
张有涛
叶庆国
罗宁
李晓鹏
Wang Ming;Zhang Youtao;Ye Qingguo;Luo Ning;Li Xiaopeng(Nanjing Electronic Devices Institute,Nanjing 210016,China;Nanjing GuoBo Electronics Co.,Ltd.,Nanjing 210016,China;Science and Technology on Monolithic Integrated Circuits and Modules laboratory,Nanjing 210016,China)
出处
《电子技术应用》
2020年第4期34-39,共6页
Application of Electronic Technique
