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多协议仲裁加解密读写CPU内存的IP核设计

IP design for multi-protocol arbitration encryption and decryption to access CPU memory
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摘要 传统优先级反转或固定优先级仲裁方式会降低CPU(central processing unit)访存效率,且无法对内存数据进行保护。为此,设计一种能够仲裁控制多协议对CPU内存单元进行高效加解密读写的数字IP(intellectual property)。将同步电路与握手协议结合,实现两种协议间的跨时钟域处理;对多协议间的高效仲裁进行研究,提出饱和仲裁算法;设计以地址为种子的伪随机加密算法,完成对内存读写数据的加解密操作;设计自定义的访存协议,完成对内存的直接存取。仿真和流片结果表明,设计能很好调度多接口协议访存,防止CPU内存单元内的数据被非法破解。 The traditional priority inversion or fixed priority arbitration method may reduce the memory access efficiency and leave the memory data unprotected.For this reason,a digital IP which efficiently arbitrated and controlled multi-protocol to encrypt or decrypt the data for reading and writing the CPU memory was designed.The synchronization circuit and handshake protocol were combined to realize cross-clock domain processing between the two protocols.A saturated arbitration algorithm was proposed to arbitrate the two protocols efficiently.A pseudo-random encryption algorithm with address as seed was designed to encrypt and decrypt the read-write data for memory access.A custom memory access protocol was designed to complete the direct access to memory.Results of simulation and tap-out show that the proposed design can well schedule the access of multi-interface protocol and prevent the data in CPU memory unit from being illegally taken.
作者 罗平 王瑞雪 覃海洋 LUO Ping;WANG Rui-xue;QIN Hai-yang(School of Electrical and Information,City College of Science and Technology,Chongqing University,Chongqing 402167,China)
出处 《计算机工程与设计》 北大核心 2020年第5期1248-1252,共5页 Computer Engineering and Design
基金 2018年重庆市本科高校大数据智能化类特色专业建设基金项目(渝教高[2018]12号)。
关键词 仲裁器 伪随机加密 跨时钟域处理 内存加解密 中央处理器 多协议控制 arbiter pseudo random encryption cross clock domain processing memory encryption and decryption CPU multi-protocol control
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