一种优化寄存器默认值的掩膜后ECO方法

A Post-mask ECO Method for Optimizing Register Default Value

芯片在通过多目标晶圆(Multi Project Wafer,MPW)得到的样片进行测试后,可能会发现芯片内部部分寄存器上电复位后的默认值不合理,需要进行优化。本文提出了一种优化寄存器默认值的掩膜后工程改变命令(Engineering Change Order,ECO)方法,其特点是只修改金属层掩膜板即可实现寄存器默认值的优化,减少芯片进行工程批流片的成本。我们利用全局控制寄存器模块进行试验评估,最后的仿真结果和签核验证表明ECO后的寄存器默认值满足修改要求。

After testing the MPW shuttle chips,we may find that the default values of some internal registers after power-on reset are not reasonable and need to be optimized.This paper proposes a post-mask ECO method for optimizing the default value of register,by only modifying the metal layer masks,which reduces the cost of chip engineering tape out.The proposed method has been verified by the global control register module and the final simulation results show that this ECO method can meet the requirements.