基于FPGA的1024点FFT在信号实时解码处理中的实现

Implementation of 1024 Points FFT Based on FPGA in Real-time Decoding of Signal

FFT(快速傅里叶变换)是有限长序列DFT(离散傅里叶变换)的快速算法,可以实现时域信号到频域信号的变换,其基本运算是蝶形运算,可使DFT计算时间缩短1~2个数量级。结合工程实际,给出了1024点FFT蝶形运算的推导和反向整合流程图,针对流水输入的信号实时解码分析的需求,在基于XILINX公司的Zynq-7000系列的器件上,由FPGA逻辑实现FFT算法对信号进行1024点实时解析,提取出相应频点数据后,再由ZYNQ器件中的ARM硬核对获取的频点数据进行后续分析。文中重点叙述基2快速傅里叶变换算法的FPGA逻辑架构设计,采用级联蝶形运算结构和数据RAM的方式,实现对流水输入的信号实时解码处理。

Fast Fourier transform(FFT)is a fast algorithm with finite length sequence discrete Fourier transform(DFT),which can realize the transformation of time domain signal to frequency domain signal,its basic operation is butterfly operation,which can shorten DFT calculation time by 1~2 orders of magnitude.Based on engineering practice,the derivation and reverse integration flow chart of 1024 points FFT butterfly operation is presented.According to the requirements of real-time decoding and analysis of pipeline input signals,in the Zynq-7000 series of devices based on XILINX Co.,the signal is analyzed by 1024 points FFT algorithm implemented by FPGA logic,after the corresponding frequency point data is extracted,the frequency point data obtained by ARM hard core in ZYNQ device is analyzed later.The design of the FPGA logic architecture of the basic 2 fast Fourier transform algorithm is focused on.The cascade butterfly operation structure and data RAM are used to realize real-time decoding of the pipeline input signal.