摘要
SOI CMOS工艺具有高的截止频率和良好的温度稳定性,能够满足微波毫米波雷达收发芯片在多种应用场景下的使用要求.采用90 nm SOI CMOS工艺,设计一种A类无输出阻抗匹配网络Stacked-FET功率放大器,改善了功率放大器的饱和输出功率和可靠性.基于此功率放大器设计并实现了一款24 GHz信号发生器电路.通过电磁场仿真分析研究了Dummy金属对片上螺旋电感性能的影响.经流片加工测试,结果表明,该信号发生器电路能够输出22.2~24.7 GHz的信号,平均输出功率为8.83 dBm,峰值输出功率为10.5 dBm.在偏1 MHz和10 MHz处压控振荡器的相位噪声分别为-91 dBc/Hz和-123 dBc/Hz.芯片面积为1.4 mm×1.4 mm.
SOI CMOS technologies feature high cut-off frequencies and superior temperature stability,which can meet different kinds of application requirements for microwave and millimeter wave radar transceivers.A class-A Stacked-FET power amplifier using 90 nm SOI CMOS technology was designed with output matching network omitted.The saturated output power and reliability of power amplifier were improved.A 24 GHz signal generator was designed based on this power amplifier.Influences of Dummy filled in semiconductor process on the performance of spiral inductor were studied and analyzed using electromagnetic simulations.The circuit was fabricated and tested.Measured results indicated that this chip can transmit a signal operating at 22.2~24.7 GHz with an average output power of 8.83 dBm and a peak output power of 10.5 dBm.The phase noise of the Voltage Controlled Oscillator(VCO)at 1 MHz offset and 10 MHz offset was-91 dBc/Hz and-123 dBc/Hz,respectively.The area of the entire chip was 1.4 mm×1.4 mm.
作者
夏庆贞
李东泽
常虎东
孙兵
刘洪刚
XIA Qingzhen;LI Dongze;CHANG Hudong;SUN Bing;LIU Honggang(High-Frequency High-Voltage Device and Integrated Circuits R&D Center,Institute of Microelectronics Chinese Academy of Sciences,Beijing 100029,China;University of Chinese Academy of Sciences,Beijing 100029,China)
出处
《湖南大学学报(自然科学版)》
EI
CAS
CSCD
北大核心
2020年第6期96-102,共7页
Journal of Hunan University:Natural Sciences
基金
国家重点研发计划资助项目(2016YFA0202304,2016YFA0201903)
国家自然科学基金资助项目(61674168,61504165)
中国科学院微电子研究所微电子器件与集成重点实验室开放项目。
关键词
SOI
CMOS
功率放大器
信号发生器
Silicon-On-Insulator Complementary Metal Oxide Semiconductor(SOI CMOS)
power amplifiers
signal generators