超导磁储能系统自适应分数阶滑模控制设计

Adaptive Fractional-order Sliding-mode Control Design of Superconducting Magnetic Energy Storage Systems

针对脉宽调制电流源型换流器(pulse-width modulated current source converter,PWM-CSC)的超导磁储能(superconducting magnetic energy storage,SMES)系统,设计了一款自适应分数阶滑模控制(adaptive fractional-order sliding-mode control,AFOSMC)策略。首先,将SMES系统的非线性、参数不确定性、未建模动态、以及外部扰动聚合成一个广义扰动,并利用滑模状态扰动观测器(sliding-mode state and perturbation observer,SMSPO)在线估计该扰动值。随后,通过分数阶滑模控制(fractional-order sliding-mode control,FOSMC)实时地对该扰动进行完全补偿,从而显著提高SMES系统的鲁棒性并获得全局一致的控制性能。同时,AFOSMC仅需测量SMES系统的d-q轴电流,并且采用扰动的实时估计值替代上限值进行补偿,因而其易于实现且具有更为合理的控制成本。该文进行了4种算例研究,即:1)有功功率和无功功率调节;2)电网故障下的系统恢复;3)新能源接入的功率波动平抑;4)参数不确定时的鲁棒性。仿真结果表明,AFOSMC相较于其他算法,具有最强的鲁棒性和最佳的动态响应性能。最后,基于dSpace的硬件在环(hardware-in-loop,HIL)实验验证了其硬件可行性。

This paper aims to design an adaptive fractionalorder sliding-mode control(AFOSMC) strategy for pulse-width modulated current source converter(PWM-CSC) based superconducting magnetic energy storage(SMES) systems. Firstly, the nonlinearities, parameter uncertainties, unmodelled dynamics, and external disturbances of SMES systems are aggregated into a generalized perturbation, which is estimated online by a sliding-mode state and perturbation observer(SMSPO). Then, a fractional-order sliding-mode control(FOSMC) is utilized to implement a completely online compensation of the estimated perturbation, such that noticeable robustness and global consistent control performance can be achieved. Moreover, only the dq-axis currents need to be measured while the real-time estimate of perturbation replaces its upper bound, thus AFOSMC can achieve more reasonable control efforts. Four case studies are carried out, i.e., 1) regulation of the active and reactive power, 2) system recovery capability under the power grid fault, 3) power fluctuation suppression under the renewable energy integration, and 4) system robustness under the parameter uncertainties, respectively. Simulation results validate that AFOSMC can achieve the greatest robustness and optimal dynamic response compared with other strategies. Finally, a dSpace based hardware-in-the-loop(HIL) test is implemented to verify its hardware implementation feasibility.