一种高效率低成本混合型H桥输出驱动器

A High Efficiency Low Cost Hybrid H-Bridge Output Driver

采用0.5μm CMOS工艺,设计了一种高效率、低成本的混合型H桥输出驱动器。该输出驱动器采用甲乙类放大器和丁类放大器相结合的非对称H桥结构,并通过反馈环路使两种不同类型的放大器协调工作。具有高闭环增益的四级甲乙类放大器优化了输出驱动器的线性度,并减小了电流纹波、电磁干扰以及外围器件个数。该输出驱动器在芯片中占的面积约为1.44 mm2,测试及仿真使用的电源电压为3.3~5 V。结果表明,当甲乙类放大器的输出负载电容为3300 pF,在典型工艺角以及常温下,其开环直流增益为99.21 dB,相位裕度为58.24°,增益带宽积为631 kHz;当载波频率为1 MHz时,丁类放大器的非重叠时间约为25 ns。此外,该输出驱动器的输出电压为电源电压的2倍,使得功率管效率达到75%以上。

A hybrid H-bridge output driver with high efficiency and low cost was designed based on 0.5μm CMOS process.The output driver used an asymmetric H-bridge structure which combined a class-AB amplifier and a class-D amplifier,and the two different types of amplifiers work in harmony through a feedback loop.The four-stage class-AB amplifier with a high closed-loop gain can optimize the linearity of the output driver,while the current ripple,the electromagnetic interference,and the number of peripheral devices are reduced.The output driver occupied an area of about 1.44 mm2 in the chip,and the power supply voltage used for simulation and measurement was 3.3-5 V.The results show that when the output load capacitance is 3300 pF at the typical process corner and room temperature,the open-loop DC gain of the class-AB amplifier is 99.21 dB,the phase margin is 58.24°,and the gain-bandwidth product is 631 kHz.The non-overlap time of the class-D amplifier is about 25 ns at a carrier frequency of 1 MHz.The output voltage of the output driver is twice that of the power supply voltage,which makes the power transistor efficiency achieves more than 75%.