基于FPGA的1553B总线远程终端设计

Design of 1553B bus remote terminal based on FPGA

为适应1553B总线机载通信设备小型化、高性能的要求,以ALTERA公司EP2C5T144C8N现场可编程逻辑门阵列最小系统作为通信控制核心,以DDC公司BU-64843T作为1553B总线接口芯片,构架一种结构简单的1553B总线远程终端。利用FPGA控制程序设置远程终端工作模式、RT地址、中断源等,为总线通信数据指定存储地址,启动通信过程。使用1553B总线测试设备对1553B总线远程终端进行测试,完成消息传输、数据存储、错误分析等功能,实时误码率为0。1553B总线远程终端内部取消了电平转换器和隔离变压器,有效减小了模块的体积、重量、复杂性,能以1 Mb/s的速率进行稳定可靠的总线通信,实时为机载通信设备提供准确的指令和数据,具有较强的实用性。

To meet the requirements of miniaturization and high performance of 1553 B bus airborne communication equipment,EP2 C5 T144 C8 N field programmable logic gate array minimum system of ALTERA company is taken as the communication control core,and DDC company BU-64843 T is taken as the 1553 B bus interface chip to construct a 1553 B bus remote terminal with simple structure.FPGA control program is used to set up the working mode of remote terminal,RT address,interrupt source,specify the storage address for bus communication data,and start the communication process.Use 1553 B bus test equipment to test of 1553 B bus remote terminal,completion message transmission,data storage,error analysis,and other functions,real-time error rate is 0.1553 B bus remote terminal internal cancelled level converter and isolation transformer as well as effectively reduced the volume and weight of the module.It can realize stable and reliable bus communication in the rate of 1 Mb/s,real-time to provide airborne communications equipment instructions and data that are accurate,with strong practicability.