3D-IC中基于时分复用的TSV蜂窝容错设计

Fault Tolerant Design of TSV Honeycomb Structure Based on Time Division Multiple Access in 3D-ICs

三维芯片(3D-IC)通过硅通孔(TSV)技术来实现电路的垂直互连,延续了摩尔定律,但在制造、绑定等过程中,TSV容易引入各类缺陷。添加冗余TSV是解决该问题的有效方法之一,但TSV面积开销大、制造成本高。提出一种基于时分复用(TDMA)的TSV蜂窝结构容错设计方案,它基于时间对信号TSV进行复用。实验结果表明,与一维链式TDMA结构相比,蜂窝TDMA结构提高了30%的故障覆盖率,并且故障覆盖率随着蜂窝阵列的扩展持续提升。在64TSV阵列中,与一维TDMA结构相比,蜂窝拓扑结构的面积开销降低了10.4%。

In order to keep Moore’s law moving forward,through-silicon-via(TSV)is used to complete the vertical interconnection in the 3-D chips.However,defects are easily to appear in the process of manufacturing and binding.Redundant TSV is used as one of the effective ways to solve this problem while TSV has large area and manufacturing cost.A fault tolerant design scheme of TSV cellular structure based on time division multiple access(TDMA)which reused TSV based on time slice was proposed.The experimental results showed that the cellular TDMA structure improved the fault coverage by 30%compared with the one-dimensional chain TDMA structure,and the fault coverage continued to increase with the expansion of cellular arrays.In 64 TSV arrays,the area cost of cellular topology was 10.4%lower than that of one-dimensional TDMA structure.