摘要
针对LTE MTC蜂窝物联网通信下的应用场景,本文给出了一种基于TSMC 65 nm CMOS LP工艺设计的AB类线性功率放大器。为达到一定的功率增益要求,采用两级级联结构,包括驱动级和功率级。两级电路均采用差分结构,可以在不提高电源电压的情况下,达到足够的输出功率和线性度,同时还有利于抑制共模噪声,减小寄生参数及键合线电感对电路性能的影响。为了避免晶体管被击穿,同时提高输入输出端口之间的隔离度,两级电路均采用共源共栅(Cascode)结构。后仿真结果表明,电源电压3.3V情况下,功率放大器在1880 MHz^1920 MHz频段工作稳定,输入反射系数S11<-10 dB,输入匹配良好,输出1 dB压缩点为24.1 dBm,饱和输出功率大于26 dBm,功率增益大于20 dB,输出1 dB压缩点出的功率附加效率25%,峰值效率达到30%。
Aiming at the application scenarios of LTE MTC cellular IoT communication,this paper presents a class AB linear power amplifier based on 65 nm CMOS LP process. To achieve a certain power gain requirement,a two-stage cascade structure,including a driver stage and a power stage,is employed. The two-stage circuit adopts a differential structure,which can achieve sufficient output power and linearity without increasing the power supply voltage. It also helps to suppress common mode noise and reduce the influence of parasitic parameters and bond wire inductance on circuit performance. In order to avoid transistor breakdown and improve the isolation between the input and output ports,the two-stage circuit uses a cascode structure. Post-simulation results show that the power amplifier operates stably in the frequency range of 1 880 MHz^1 920 MHz with the power supply voltage of 3.3 V. Input reflection coefficient is S11<-10 dB. The input is well matched and the output 1 dB compression point is 24.1 dBm. Saturated output power is greater than 26 dBm and power gain is more than 20 dB. Power added efficiency at the output 1 dB compression point is 25%,and peak efficiency is 30%.
作者
肖宁
朱祥飞
冯景
樊祥宁
XIAO Ning;ZHU Xiangfei;FENG Jing;FAN Xiangning(School of Microelectronics,Southeast University,Nanjing 210096,China;School of Information Science and Engineering,Southeast University,Nanjing 210096,China)
出处
《电子器件》
CAS
北大核心
2020年第3期595-600,共6页
Chinese Journal of Electron Devices
基金
江苏省研究生创新工程项目(SJCX18_0057)
国家电网科技项目(SGTYHT/17-JS-201)。