ISAR基带干扰系统设计与实现

Design and implementation of ISAR baseband jamming system

在逆合成孔径雷达(ISAR)成像干扰中,采用数字图像合成(DIS)技术的假目标欺骗干扰是一种重要的干扰样式。针对多个散射点图像模板的ISAR成像干扰中的干扰信号频率不十分精确和硬件实现较复杂的问题,采用改进的基于直接数字式频率合成器(DDS)的DIS方法,设计了一种ISAR成像基带干扰系统。该方法通过计算模板散射点延时、多普勒频移、散射强度等信息,生成基带干扰信号,然后作用到雷达信号上,最终达到ISAR成像干扰的效果。该ISAR成像基带干扰系统在Xilinx的Virtex-7系列现场可编程门阵列(FPGA)平台上实现。测试结果表明,该系统设计正确,能够实现ISAR成像干扰,而且生成的干扰信号频率准确,硬件实现复杂度低。

In the inverse synthetic aperture radar(ISAR)imaging jamming,false target deception jamming using the digital image synthesis(DIS)technology is an important jamming mode.Aiming at the problem of inaccurate frequency of interference signal and complex hardware implementation in ISAR imaging jamming with multiple scattering point image templates,an ISAR imaging baseband jamming system is designed by using an improved DIS method based on the direct digital frequency synthesizer(DDS).This method generates baseband jamming signals by calculating the scattering point delay,Doppler frequency shift,scattering intensity,and so on,then it acts on radar signals,and finally achieves the effect of ISAR imaging jamming.The ISAR imaging baseband jamming system is implemented on the Xilinx Virtex-7 series of the field programmable gate array(FPGA)platform.Test and simulation results show that the proposed system is designed correctly and can realize ISAR imaging jamming.Moreover,the generated jamming signal frequency is accurate,with low complexity in hardware implementation.