摘要
传统的基于三态反相器设计的时间放大器(TDA)具有电路复杂度低、对电压余度和温度的影响不敏感的特点,但该结构的时间分辨率低,增益误差大,应用范围相对较窄.本文提出一种改进的时间放大器结构,通过重新设计延迟链控制信号产生电路以实现高精度增益的要求.基于40 nm CMOS工艺进行Spectre仿真结果表明,本文提出的TDA结构不仅具有稳定可控的增益(增益误差保持在±4%以下)和高时间分辨率(380 fs),而且输入范围得到进一步提升.
The traditional three-state inverter based time-difference amplifier(TDA)has the characteristics of low circuit complexity,insensitivity to voltage margin and temperature,but the structure has low time resolution,large gain error and relatively narrow application range.An improved TDA structure that achieves high-precision gain by redesigning the delay chain control signal generation circuit is presented in this paper.Measurement results of Spectre based on 40 nm CMOS process show that the proposed TDA not only has stable and controllable gain(gain error is less than±4%)and high time resolution(up to 380 fs),but the input range is further improved.
作者
李瑞
蒋剑飞
王琴
LI Rui;JIANG Jian-fei;WANG Qin(School of Electronic Information and Electrical Engineering,Shanghai Jiao TongUniversity,Shanghai 200240,China)
出处
《微电子学与计算机》
北大核心
2020年第8期43-48,共6页
Microelectronics & Computer
基金
国家自然科学基金项目(61176037)。
关键词
时间放大器
三态反相器
传输门逻辑
线性度
高时间分辨率
time-difference amplifier
tri-state inverter
transmission gate logic
linearity
high time resolution