双栅负电容隧穿场效应晶体管的仿真

Simulation of Double-Gate Negative-Capacitance Tunneling Field-Effect Transistors

介绍了一种锗硅(Si1-xGex)沟道双栅(DG)负电容(NC)隧穿场效应晶体管(TFET),在Sentaurus TCAD软件中通过耦合Landau-Khalatnikov(LK)模型的方法对器件进行了仿真。首先分析了沟道中锗摩尔分数对DG TFET性能的影响。在DG TFET的基础上引入负电容结构得到DG NC TFET,并通过耦合LK模型的方法对不同铁电层厚度的DG NC TFET进行了仿真研究。最后,从能带图和带间隧穿概率的角度分析了负电容效应对器件性能的影响。仿真结果显示,在Si0.6Ge0.4沟道DG TFET基础上引入9 nm铁电层厚度的负电容结构之后,DG NC TFET的开态电流从1.3μA(0.65μA/μm)提高到了29μA(14.5μA/μm),同时有7个源漏电流量级的亚阈值摆幅小于60 mV/dec。

A Si1-xGex channel double-gate(DG)negative-capacitance(NC)tunneling field-effect transistor(TFET)was introduced and simulated by coupling with Landau-Khalatnikov(LK)model in Sentaurus TCAD software.Firstly,effects of germanium mole fraction in the channel on the performance of the DG TFET were analyzed.Then,the negative capacitance structure was introduced to get the DG NC TFET on the basis of DG TFETs and DG NC TFETs with different thickness of the ferroelectric layer were simulated by coupling the LK model.Finally,the influence of the negative capacitance effect on the performance of the device was analyzed from the point of view of energy band diagram and band-to-band tunneling probability.Simulation results show that the on-state current is increased from 1.3μA(0.65μA/μm)to 29μA(14.5μA/μm)and the subthreshold swing at seven orders of magnitude of source-drain current is less than 60 mV/dec after introducing the negative capacitance structure with a ferroelectric thickness of 9 nm based on Si0.6Ge0.4 channel DG TFET.