基于RISC-V指令集的超标量处理器设计

Superscalar Processor Design Based on RISC-V Instruction Set

针对嵌入式设备对高性能处理器低功耗的需求,基于RISC-V指令集的标准,提出了一种顺序双发射的超标量处理器设计方法。处理器代号为Egret,采用九级流水线架构,支持RV32IMAFC指令集。经过UVM验证,Egret处理器Dhrystone性能可以达到1.76DMIPS/MHz,Coremark性能达到2.88Coremark/MHz,Whetstone性能达到0.86MWIPS/MHz。处理器在FPGA上能够稳定运行在100MHz。在SMIC 40nm LL工艺下,处理器频率为600MHz,面积为1mm2。

In order to meet the demand of embedded devices for high performance processors and low power consumption,a superscalar processor design method based on RISC-V instruction set is proposed.The processor,code-named Egret,is a nine-stage pipelined architecture that supports the RV32IMAFC instruction set.After UVM verification,the performance of Egret processor can reach 1.76DMIPS/MHz,2.88Coremark/MHz and 0.86MWIPS/MHz.The processor can run stably at 100MHz on FPGA.Under the SMIC 40nm LL process,the processor frequency is 600MHz and the area is 1mm2.