湿法刻蚀调节分裂栅存储器的浮栅层形貌研究

Adjusting Profile of Floating Gate Layer in Split Gate Memory by Wet Etching

随着分裂栅存储器器件尺寸的不断减小,理想浮栅层形貌的获得越来越具有技术挑战性。在实际生产过程中,经常会发生浮栅层存在空洞缺陷的问题。结合第三代分裂栅存储器40 nm浮栅层制造工艺,分析了浮栅层出现空洞的原因。在分步刻蚀的工艺流程下,对磷酸使用两次小换酸的方式,解决了浮栅层存在空洞缺陷的问题。通过工艺优化,得到理想浮栅层形貌所需要的湿法刻蚀工艺中磷酸和氢氟酸的使用量。

With the size of split gate memory device decreasing, the floating gate layer morphology is more and more uncontrollable. In the actual production process, the void defects in the floating gate layer have been found. The reasons for the void in the floating gate layer in the fabrication process of 40 nm third-generation split-gate memory was analyzed in this paper. It was proposed that the voids had been solved by step-by-step etching with twice partly exchange phosphoric acid. Then, the usage of phosphoric acid and hydrofluoric acid which was required to obtain the ideal floating gate layer morphology was discussed.