摘要
文中基于多层共烧陶瓷基板开展预埋芯片混合集成基板技术的研究。通过对混合集成基板的内应力进行仿真分析,得到了预埋芯片基板工艺中芯片和腔体结构的最佳匹配关系。在多层共烧陶瓷基板腔体中埋置芯片并通过金凸点垂直互连实现电连接。在腔体中填充苯并环丁烯(benzocyclobutene, BCB)介质并将BCB与多层共烧陶瓷基板表面异质抛光形成平面结构,用于后续薄膜电路工艺的实施。文中详细研究和优化了金凸点芯片垂直互连工艺以及多层共烧陶瓷基板BCBAu异质界面的抛光工艺,制作出了适合后续薄膜工艺的预埋芯片混合集成基板。
In this article, the technology of hybrid integrated substrate with embedded chips based on multilayer co-fired ceramic substrate is studied. The residual stresses of hybrid integrated substrate are simulated to obtain the optimum matching relationship between chip and cavity in the process of chip-embedded substrate.Chips are embedded in the cavities of the multi-layer co-fired ceramic substrate and electrically interconnected through gold bump vertical interconnection. The cavities are filled with benzocyclobutene(BCB) dielectric material, and then the heterogeneous surface of multi-layer co-fired ceramic substrate and BCB is polished to form plane structure for subsequent process of thin-film circuit. The process of gold bump vertical chip interconnection and the process of polishing heterogeneous surface of multi-layer co-fired ceramic substrateBCBAu are thoroughly investigated and optimized. Finally, a hybrid integrated substrate with embedded chips suitable for subsequent thin-film process is fabricated.
作者
李浩
王从香
崔凯
胡永芳
LI Hao;WANG Congxiang;CUI Kai;HU Yongfang(Nanjing Research Institute of Electronics Technology,Nanjing 210039,China)
出处
《电子机械工程》
2020年第4期42-44,52,共4页
Electro-Mechanical Engineering
关键词
预埋芯片
封装
垂直互连
金凸点
异质界面
抛光
embedded chip
package
vertical interconnection
gold bump
heterogeneous surface
polishing