一种低功耗高共模抑制比运算放大器设计

Design of an operational amplifier with low power consumption and high common mode rejection ratio

为了解决传统伪差分跨导运算放大器共模抑制比较差的问题,提出了一种新型低功耗伪差分CMOS运算跨导放大器.通过共模前馈技术消除了电路输出节点处的输入共模信号,以便以最小的面积成本、功耗和寄生分量来提高共模抑制比(CMRR),并采用TSMC 0.18μm CMOS工艺对该OTA进行模拟仿真.仿真结果表明,在2 pF电容负载下,该OTA的直流增益为46.4 dB,增益带宽为14.5 MHz,相位裕度为85°.该OTA的CMRR高达110.1 dB,且在1.2 V单电源电压下,其功耗仅为28.6μW,面积仅为33×10^-5 mm^2.

In order to solve the problem of poor common mode rejection ratio of traditional pseudo differential transconductance operational amplifiers,a novel low power(LP)pseudo differential(PD)CMOS operational transconductance amplifier(OTA)was proposed.The input common mode signal at the output node of a circuit was eliminated through a common mode feedforward(CMFF)technique to improve the common mode rejection ratio(CMRR)with minimal area cost,power consumption and spurious components.In addition,the OTA was simulated with TSMC 0.18μm CMOS technology.The simulation results show that the OTA has a DC gain of 46.4 dB,a gain band width of 14.5 MHz and a phase margin of 85°under a capacitive load of 2 pF.Furthermore,the CMRR of OTA is as high as 110.1 dB,and its power consumption is only 28.6μW at a single supply voltage of 1.2 V and an area of only 33×10^-5 mm^2.