一种故障自恢复容错计算机设计与实现

Design and Implementation of a Self-recovery Fault-tolerant Computer

围绕安全关键系统对容错计算机长时工作的可用性和可靠性提升需求,以航空飞行器高可靠计算机为应用背景,提出了一种基于FPGA可重构自恢复的容错计算机设计方案,采用硬件故障自恢复提高机载计算机可靠性,设计了动态可重构自恢复方法,建立分级余度管理算法减缓故障降级。采用故障预测与推理技术提高机载计算机的可维护性,设计了故障预警电路、预测推理模型和辅助决策系统。通过搭建自恢复容错计算机的原型平台和测试环境对自恢复性能进行测试验证,建立可靠性模型进行计算分析,证明在不增加系统余度配置的情况下,提高了系统的可靠性和可用性。

Enhance the availability of fault-tolerant computers working long hours around safety critical systems,a design scheme of fault-tolerant computer based on FPGA reconfigurable self recovery is proposed.Hardware fault self recovery is adopted to improve reliability of airborne computer,dynamic reconfigurable self recovery method is designed,and hierarchical redundancy management is established.The algorithm slows down the degradation of faults.Fault prediction and reasoning technology is used to improve the maintainability of airborne computer.Fault early warning circuit,predictive reasoning model and auxiliary decision system are designed.Finally,the self recovery performance is tested and verified by building the prototype platform and test environment of the self recovery fault-tolerant computer,and the reliability model is established for calculation and analysis,which proves that the reliability and availability of the system are improved without increasing the system redundancy configuration.