应用于有源芯片三维集成的小孔径高深宽比TSV刻蚀工艺

TSV Etching Technology with Small Aperture and High Aspect Ratio Applied to Active Chip 3D Integration

为了完成有源芯片上小孔径、高深宽比硅通孔(TSV)的制作,研究了基于电感耦合等离子体(ICP)技术的SiO2微孔深刻蚀工艺,实现了以C4F8/Ar为刻蚀气体源、刻蚀速率为0.612μm/min、刻蚀选择比为2.122、刻蚀角度为80.573°的SiO2微孔刻蚀;优化了小孔径、高深宽比TSV刻蚀形貌。通过降低衬底温度,消除了"咬边"现象,通过缩短单步循环中刻蚀时间和钝化时间,减小了"扇贝"尺寸,实现了TSV孔径约为5μm、深宽比为10∶1、侧壁光滑、无"咬边"现象的TSV刻蚀。结合优化后的SiO2微孔刻蚀工艺和小孔径、高深宽比TSV刻蚀工艺完成了表面具有约10μm厚的SiO2、孔径约为5μm、深宽比大于10∶1的TSV刻蚀。

In order to complete the fabrication of small aperture and high aspect ratio through silicon via(TSV)on the active chip,the deep etching process of SiO2 micropore based on the inductively coupled plasma(ICP)technology was studied.The etching of SiO2 micropore with C4F8/Ar as the etching gas source,the etching rate of 0.612μm/min,the etching selection ratio of 2.122 and the etching angle of 80.573°was achieved.The etching morphology of the TSV with small aperture and high aspect ratio was optimized.By reducing the substrate temperature,the undercut phenomenon was eliminated.By shortening the etching time and passivation time in the single-step cycle,the scallop size was reduced.The etching of TSV with about 5μm aperture,10∶1 high aspect ratio and smooth side wall without undercut was realized.And combined the optimized SiO2 micropore etching process with TSV pore etching process of small aperture and high aspect ratio,the TSV etching with SiO2 of about 10μm thickness on the surface,about 5μm aperture size and more than 10∶1 aspect ratio was completed.