摘要
SWD协议仅使用两线,即可实现对Cortex-M处理器内部资源的访问。相比传统的JTAG接口具有速率高、结构简单紧凑、使用引脚数少等优点。通过分析SWD调试原理与框架,提出了SWD协议的数据传输分层模型,实现各层数据传输的方法与过程。实验结果表明,在Cortex-M3处理器平台上,SWD协议对Flash存储器编程速率最高可以达到10 Mb/S。
The serial wire debug(SWD)protocol uses only two wires to achieve access to the internal resources of the Cortex-M processor.Compared with the traditional joint test action group(JTAG)interface,it has the advantages of high speed,simple and compact structure,and few pins.By analyzing the principle and framework of SWD debugging,a layered model of SWD protocol data transmission is proposed.The method and process of data transmission at each layer is realized then.The experimental results show that on the Cortex-M3 processor platform,the SWD protocol can program the FLASH memory at a rate of up to 10 Mb/S.
出处
《机电一体化》
2020年第4期20-26,共7页
Mechatronics
基金
浙江省教育厅科研项目(编号:Y201737315)。