背面减薄工艺对InP芯片成品率的影响

Effect of Back Thinning Process on Yield of InP Chip

半导体晶圆背面减薄工艺包含临时键合、研磨、解键合、薄片清洗4个步骤。工艺应力损伤使芯片性能劣化甚至失效,成为大光敏区型InP基探测器芯片的工艺瓶颈,须加以解决。将4个主要步骤分别优化,通过降低键合压力、减少研磨损伤层、保护胶隔绝污染、剥离保护胶摈弃刷洗,使芯片成品率从30%提高到95%以上(芯片尺寸?准1000μm)。经过多批次流片验证了此方法的正确性和稳定性,对阵列型芯片研制的成品率意义重大,对企业节省生产成本有积极影响。

Wafer back thinning process includes four steps:temporary bonding,grinding,de-bonding and wafer cleaning.The process stress damage makes the performance of the chip deteriorate or even fail,which becomes the bottleneck of the large photosensitive region InP based detector chip,which must be solved.The four main steps are optimized respectively.By reducing bonding pressure,reducing grinding damage layer,coating protective glue to isolate pollution,stripping protective adhesive and discarding brushing,the yield of chip is increased from 30%to more than 95%(chip size is Ф1000μm).The correctness and stability of this method have been verified by multi batch production.It is of great significance to the yield of array chip development and has a positive impact on the enterprise to save production costs.