基于LTCC基板QFN封装高速链路仿真及性能测试

High Speed Link Simulation and Performance Test of QFN Package Based on LTCC Substrate

针对带有QFN(方形扁平无引脚封装)封装结构和腔槽的LTCC(低温共烧陶瓷)封装基板难以测试的问题,借鉴2X Thru原理,提出一种采用辅助测试板并进行去嵌入,从而获得LTCC封装基板性能的方法。通过对QFN与测试板互连结构的仿真优化,获得了较理想的阻抗匹配结构。在此基础上,对包含2个测试转接板、互连金丝、LTCC基板垂直通孔和QFN结构输出端,传输DC-40 GHz的差分信号的整个链路进行了联合仿真分析。最后,通过实物测试,对辅助测试板去嵌入后其性能基本与仿真结果一致,证明该方法能够解决此种结构的LTCC封装基板的测试问题。同时,获得整个链路的信号传输性能为插入损耗值≤2.7 dB,回波损耗≤-10 dB,满足产品对高速带宽的使用要求。

Aiming at the problem that the packaging substrates with QFN(Quad Flat No-lead Package)packaging structure and cavity slots are difficult to test,this paper proposes a method to obtain the performance of LTCC(Low Temperature Co-fired Ceramic)packaging substrates by using auxiliary test board and de-embedding based on 2X Thru principle.An ideal impedance matching structure is obtained by simulating and optimizing the interconnection structure between QFN and test board.On this basis,the entire link including two test adapter boards,interconnection gold wire,vertical through-hole of LTCC substrate and output of QFN structure to transmit DC-40 GHz differential signal is simulated and analyzed jointly.Through physical test,the performance of the auxiliary test board after de-embedding is basically consistent with the simulation results,which shows that the method can solve the test problem of LTCC packaging substrate with this structure.At the same time,the signal transmission performance of entire link is obtained:insertion loss value is less than 2.7 dB,echo loss is less than-10 dB,which meets the requirements of our products for high-speed bandwidth.